hardware description language
英 [ˈhɑːdweə(r) dɪˈskrɪpʃn ˈlæŋɡwɪdʒ]
美 [ˈhɑːrdwer dɪˈskrɪpʃn ˈlæŋɡwɪdʒ]
网络 硬件描述语言; 硬体描述语言; 语言; 硬件设计语言; HDL语言
双语例句
- This is a hardware description language used to design the traffic light procedures, and practical, it is economic.
这是一个用硬件描述语言来设计的交通灯程序，和实用，很经济。 - Nonprocedural computer hardware description language
非过程计算机硬件描述语言 - The circuit software was designed using schematic diagram and hardware description language ( VHDL) respectively.
该抢答器单元电路的软件设计分别利用原理图设计、硬件描述语言设计完成。 - In the design flow of hardware description language, one of the design ways, Top-Down, was used so as to shorten the design periods and enhance the expansile performance.
在硬件描述语言的设计流程中，信道盲均衡器运用了Top-Down的模块化设计方法，大大缩短了设计周期，提高了系统的稳定性和可扩展性。 - An Analog Hardware Description Language ( AHDL) model of the membrane was developed to enable the simulations of the complete microsystem.
一个模拟硬件描述语言（AHDL）模型膜发展使模拟系统完整化。 - The VHDL hardware description language is designs the source document to be possible to use is similar with the C language written form, and uses the structural design method.
VHDL硬件描述语言是设计源文件可以采用类似与C语言的书写形式，并采用结构设计方法。 - The VHDL language as an advanced hardware description language is playing a more and more important role in digital circuitry designs with its nimble and simple design style.
VHDL语言作为先进的硬件描述语言，也以其灵活、简洁的设计风格再电路设计中发挥着越来越重要的作用。 - The application of hardware description language VHSIC in design of ASIC
硬件描述语言在专用集成电路设计中的应用 - As a hardware description language, VHDL has being used more and more by electronic circuit designers.
VHDL作为一种电路硬件描述语言，目前正在被越来越多的电子技术设计人员所应用。 - VHDL are widely used by electronic technology professional as IEEE standard circuit hardware description language.
VHDL作为一种IEEE标准的电路硬件描述语言，正广泛地被电子技术人员使用。 - VHDL is a kind of standard hardware description language which used in EDA.
VHDL作为IEEE的标准硬件描述语言，主要用于数字电子系统EDA。 - Hardware description language VHDL is very powerful for the application design of programmable logic device.
硬件描述语言VHDL非常适用于可编程逻辑器件的应用设计。 - The development and its features of a new type hardware description language, VHDL, is introduced.
介绍了新型硬件描述语言VHDL的发展及特点； - UHDL-A Universal Hardware Description Language and its compiler is presented in this paper.
本文介绍了一种通用硬件描述语言&UHDL及其编译器的设计与实现。 - In this thesis, VHDL hardware description language was applied to program FPGA to realize high accurate pulse generator.
本文采用VHDL硬件描述语言对FPGA编程实现了高精度脉冲发生器。 - This Paper discusses the design for testability with boundary scan and its hardware description language VHDL.
在这基础上讨论了边界扫描可测性设计技术及其硬件描述语言VHDL。 - Based on ISE Foundation 6.1 soft platform, we made research and design on the CPLD hardware Inference applying VHDL Hardware Description Language.
基于ISEFoundation6.1软件平台，采用VHDL硬件描述语言对CPLD硬件推理机进行了研究和设计。 - In this paper, Verilog HDL& a hardware description language is introduced.
介绍硬件描述语言Verilog-HDL。 - The main work is as follows: Study video signal, USB2.0 specification and Hardware Description Language;
主要完成了以下工作：研究视频信号、USB2.0规范及硬件描述语言； - Finally the USB controller is described with hardware description language, simulated and synthesized by the tools.
最后用硬件描述语言对USB设备控制器进行描述，并用仿真工具和综合工具对该设计进行仿真和综合。 - This design adopts the design method of Top-Down which is used broad in ASIC design today, and using hardware description language Verilog as inputs designs the circuit modules.
本系统设计采用了当今集成电路设计中所广泛采用的自顶向下（Top&Down）的设计方法，用硬件描述语言Verilog作为设计输入对电路模块进行了设计。 - VHDL ( Very High Speed Integrated Circuit Hardware Description Language) is widely applied in electronic design fields today.
VHDL（超高速集成电路硬件描述语言）在电子设计领域中已得到了广泛用。 - The design of FPGA uses design method of top-down and Hardware Description Language, reduces develop time and cost.
FPGA的设计采用自顶向下的设计方法和硬件描述语言，大大缩短了开发时间，降低了开发成本，设计中使用相关的EDA软件实现了仿真。 - It described the structure and algorithm flow using the hardware description language ( VHDL).
用硬件描述语言（VHDL）描述了该算法的整体结构和算法流程； - The RTL-level design and verification of the three modules using the Verilog hardware description language is completed.
使用Verilog硬件描述语言完成了三个运算逻辑模块RTL级的设计与验证。 - Research fingerprint recognition algorithm IP core in Verilog HDL ( hardware description language).
研究基于Veriloghdl（硬件描述语言）的指纹识别算法IP核。 - A key character of the EDA is uses hardware description language ( HDL) to complete the design document.
EDA的一个重要特征就是使用硬件描述语言（HDL）来完成设计文件。 - By using the Verilog hardware description language to develop under the Quartus II 6.0 software platform, simulation and debug has been made to test the logical control system.
完成了激光打印机逻辑控制系统的软件设计与实现，采用Verilog硬件描述语言在QUARTUSII6.0软件平台下进行开发，对逻辑控制系统进行了仿真及调试。 - The core part of the hardware sub-system is realized with FPGA while the hardware description language is Verilog.
采用FPGA实现发射机和接收机的硬件子系统的核心部分，硬件描述语言采用的是Verilog。 - This paper also realizes the efficient channelized structure module for RFI detection with the hardware description language.
同时论文用硬件描述语言实现了基于信道化结构的辐射计射频干扰检测方法。